Publications

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2025

USENIX Security "Secure Caches for Compartmentalized Software"
Kerem Arikan, Huaxin Tang, Willimas Zhang Cen, Yu David Liu, Nael Abu-Ghazaleh and Dmitry Ponomarev
USENIX Security Symposium'25, Seattle, WA, August 2025.

2024

NDSS "TEE-SHirT: Scalable Leakage-Free Cache Hierarchies for TEEs"
Kerem Arikan, Abraham Farrell, Willimas Zhang Cen, Jack McMahon, Barry Williams, Yu David Liu, Nael Abu-Ghazaleh, Dmitry Ponomarev
Network and Distributed Systems Security Symposium (NDSS), San Diego, February 2024.

2022

USENIX Security "Composable Cachelets: Protecting Enclaves from Cache Side-Channel Attacks"
Daniel Townley, Kerem Arikan, Yu David Liu, Dmitry Ponomarev, Oguz Ergin
USENIX Security Symposium, Boston, MA, August 2022.

2021

SEED "Track Conventions, not Attack Signatures: Fortifying X86 ABI and System Call Interfaces to Mitigate Code Reuse Attacks"
Sarp Ozdemir, Rutvik Saptarshi, Aravind Prakash, Dmitry Ponomarev
IEEE International Symposium on Secure and Private Execution Environment Design (SEED), September 2021.

ICPP "GVT-Guided Demand-Driven Scheduling in Parallel Discrete Event Simulation"
Ali Eker, David Timmerman, Barry Williams, Kenneth Chiu, Dmitry Ponomarev
International Conference on Parallel Processing (ICPP), August 2021.

SIGSIM-PADS "High-Performance PDES on Manycore Clusters"
Barry Williams, Ali Eker, Kenneth Chiu, Dmitry Ponomarev
ACM SIGSIM Conference on Principles of Advanced Discrete Simulation (SIGSIM-PADS), June 2021.

SIGSIM-PADS "Load-Aware Dynamic Time Synchronization for Parallel Discrete Event Simulation"
Ali Eker, Yehia Arafa, Abdel-Hameed Badawy, Nandakishore Santhi, Stephan Eidenbenz, Dmitry Ponomarev
ACM SIGSIM Conference on Principles of Advanced Discrete Simulation (SIGSIM-PADS), June 2021.

TC "Efficient Hardware Malware Detectors that are Resilient to Adversarial Evasion"
Md Shohidul Islam, Khaled N. Khasawneh, Nael Abu-Ghazaleh, Dmitry Ponomarev, Lei Yu
IEEE Transactions on Computers, 2021

2020

IISWC "Port or Shim: Stress-Testing Application Performance on Intel SGX"
Aisha Hasan, Ryan Riley, Dmitry Ponomarev
IEEE International Symposium on Workload Chracterization (IISWC), October 2020.

TDSC "EnsembleHMD: Accurate Hardware Malware Detectors with Specialized Ensemble Classifiers"
Khaled Khasawneh, Meltem Ozsoy, Caleb Donovick, Nael Abu-Ghazaleh, Dmitry Ponomarev
IEEE Transactions on Dependable and Secure Computing (TDSC), 2020.

SIGSIM-PADS "Demand-Driven PDES: Exploiting Locality in Simulation Models"
Ali Eker, Barry Williams, Dmitry Ponomarev, Kenneth Chiu
ACM SIGSIM Conference on Principles of Advanced Discrete Simulation (SIGSIM-PADS), June 2020.

2019

MICRO "LATCH: A Locality-Aware Taint CHecker"
Daniel Townley, Khaled Khasawneh, Dmitry Ponomarev, Nael Abu-Ghazaleh, Lei Yu
International Symposium on Microarchitecture (MICRO), Columbus, OH, October 2019.

PACT "SMT-COP: Defeating Side-Channel Attacks on Execution Units in SMT Processors"
Daniel Townley and Dmitry Ponomarev
International Conference on Parallel Architectures and Compilation Techniques (PACT), Seattle, WA, September 2019.

ICPP "Controlled Asynchronous GVT: Accelerating Parallel Discrete Event Simulation on Manycore Clusters"
Ali Eker, Barry Williams, Kenneth Chiu, Dmitry Ponomarev
International Conference on Parallel Processing (ICPP), Kyoto, Japan, August 2019.

DAC "SafeSpec: Banishing the Spectre of a Meltdown with Leakage-free Speculation"
Khaled Khasawneh, Esmaeil Koruyekh, Chengyu Song, Dmitry Evtyushkin, Dmitry Ponomarev and Nael Abu-Ghazaleh
Design Automation Conference (DAC), Las Vegas, June 2019.

HASP "EA-PLRU: Enclave-Aware Cache Replacement"
Atsuko Shimizu, Daniel Townley, Mohit Joshi, Dmitry Ponomarev
Workshop on Hardware and Architecture Support for Security and Privacy (HASP), in conjunction with ISCA 2019.

IEEE Spectrum "How the Spectre and Meltdown Hacks Really Worked"
Nael Abu-Ghazaleh, Dmitry Ponomarev, Dmitry Evtyushkin
IEEE Spectrum, February 2019.

2018

ICCAD "Adversarial Evasion-Resilient Hardware Malware Detectors"
Khaled Khasawneh, Nael Abu-Ghazaleh, Dmitry Ponomarev, Lei Yu
International Conference on Computer-Aided Design, 2018 (Invited paper).

DS-RT "Performance Implications of Global Virtual Time Algorithms on a Knights Landing Processor"
Ali Eker, Barry Williams, Nitesh Mishra, Dushyant Thakur, Kenneth Chiu, Dmitry Ponomarev, Nael Abu-Ghazaleh
22nd IEEE/ACM International Symposium on Distribiuted Simulation and Real-Time Applications (DS-RT),
Madrid, Spain, October 2018.

ASPLOS "BranchScope: A New Side-Channel Attack on Directional Branch Predictor"
Dmitry Evtyushkin, Ryan Riley, Nael Abu-Ghazaleh, Dmitry Ponomarev
23rd ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS),
Williamsburg, VA, March 2018.

2017

MICRO "RHMD: Evasion-Resilient Hardware Malware Detectors"
Khaled Khasawneh, Nael Abu-Ghazaleh, Dmitry Ponomarev, Lei Yu
50th International Symposium on Microarchitecture (MICRO), Boston, MA, October 2017.

ICCAD "Hardening Extended Memory Access Control Schemes with Self-Verified Address Spaces"
Jesse Elwell, Dmitry Evtyushkin, Nael Abu-Ghazaleh, Dmitry Ponomarev, Ryan Riley
International Conference on Computer-Aided Design (ICCAD), Irvine, CA, November 2017.

SIGSIM-PADS "Performance Characterization of Parallel Discrete Event Simulation on Knights Landing Processor"
Barry Williams, Dmitry Ponomarev, Nael Abu-Ghazaleh, Philip Wilsey
ACM SIGSIM Conference on Principles of Advanced Discrete Simulation (SIGSIM-PADS), Singapore, May 2017.

DAC "RIC: Relaxed Inclusion Caches for Mitigating LLC Side-Channel Attacks"
Mehmet Kayaalp, Khaled Khasawneh, Hodjat Asghari-Esfeden, Jesse Elwell, Nael Abu-Ghazaleh, Dmitry Ponomarev, Aamer Jaleel
54th Design Automation Conference (DAC), Austin, Texas, June 2017.

2016

CCS "Covert Channels through Random Number Generator: Mechanisms, Capacity Estimation and Mitigations"
Dmitry Evtyushkin, Dmitry Ponomarev
23rd ACM Conference on Computer and Communications Security (CCS), Vienna, Austria, October 2016.

MICRO "Jump over ASLR: Attacking Branch Predictors to Bypass ASLR"
Dmitry Evtyushkin, Dmitry Ponomarev, Nael Abu-Ghazaleh
49th International Symposium on Microarchitecture (MICRO), Taipei, October 2016.

TDSC "Flexible Hardware-Managed Isolated Execution: Architecture, Software Support and Applications"
Dmitry Evtyushkin, Jesse elwell, Meltem Ozsoy, Dmitry Ponomarev, Nael Abu-Ghazaleh and Ryan Riley
Accepted to the IEEE Transactions on Dependable and Secure Computing (TDSC), 2016.

TACO "Understanding and Mitigating Covert Channels through Branch Predictors"
Dmitry Evtyushkin, Dmitry Ponomarev, Nael Abu-Ghazaleh
ACM Transactions on Architecture and Code Optimization (ACM TACO), 2016.

DAC "A High-Resolution Side-Channel Attack on Last Level Cache"
Mehmet Kayaalp, Nael Abu-Ghazaleh, Dmitry Ponomarev, Aamer Jaleel
53rd Design Automation Conference (DAC), Austin, TX, June 2016. Best Paper Nominee

TC "Hardware-based Malware Detection Using Low-Level Architectural Features"
Meltem Ozsoy, Khaled Khasawneh, Caleb Donovick, Iakov Gorelik, Nael Abu-Ghazaleh, Dmitry Ponomarev
Accepted to the IEEE Transactions on Computers (TC), 2016.

2015

TACO "Rethinking Memory Permissions for Protection Against Cross-Layer Attacks"
Jesse Elwell, Ryan Riley, Nael Abu-Ghazaleh, Dmitry Ponomarev, Iliano Cervesato
ACM Transactions on Architecture and Code Optimization (ACM TACO), Volume 12, Issue 4, Article No.56, December 2015.

RAID "Ensemble Learning for Low-level Hardware-Supported Malware Detection"
Khaled Khasawneh, Meltem Ozsoy, Caleb Donovick, Nael Abu-Ghazaleh and Dmitry Ponomarev
18th International Symposium on Research in Attacks, Intrusions and Defenses (RAID), Kyoto, Japan, November 2015, pp.3-25.

HASP "Covert Channels through Branch Predictors: A Feasibility Study"
Dmitry Evtyushkin, Dmitry Ponomarev and Nael Abu-Ghazaleh
4th Workshop on Hardware and Architecture Support for Security and Privary (HASP), held in conjunction with ISCA, Portland, OR, June 2015.

IPDPS "Controlled Contention: Balancing Contention and Reservation in Multicore Application Scheduling"
Jingjing Wang, Nael Abu-Ghazaleh and Dmitry Ponomarev
International Parallel and Distributed Processing Symposium (IPDPS), Hyderabad, India, May 2015, pp.946-955.

HPCA "Malware-Aware Processors: A Framework for Efficient Online Malware Detection"
Meltem Ozsoy, Caleb Donovick, Iakov Gorelik, Nael Abu-Ghazaleh and Dmitry Ponomarev
21st International Symposium on High-Performance Computer Architecture (HPCA), Bay Area, CA, February 2015, pp.651-661.

TC "Signature-Based Protection from Code Reuse Attacks"
Mehmet Kayaalp, Timothy Schmitt, Junaid Nomani, Dmitry Ponomarev, Nael Abu-Ghazaleh
IEEE Transactions on Computers, Volume 64, Issue 2, pp.533-546, 2015.

TOMACS "AIR: Application-level Interference Resilience for PDES on Multi-core Systems"
Jingjing Wang, Nael Abu-Ghazaleh and Dmitry Ponomarev
ACM Transactions on Modeling and Computer Simulation (ACM TOMACS), Volume 25, Issue 3, May 2015.

2014

MICRO "Iso-X: A Flexible Architecture for Hardware-Managed Isolated Execution"
Dmitry Evtyushkin, Jesse Elwell, Meltem Ozsoy, Dmitry Ponomarev, Nael Abu-Ghazaleh and Ryan Riley
47th International Symposium on Microarchitecture (MICRO-47), Cambridge, UK, December 2014.

ICCD "Dynamic Associative Caches: Reducing Dynamic Energy of First Level Caches"
Kartikeyan Dayalan, Meltem Ozsoy, Dmitry Ponomarev
32nd IEEE International Conference on Computer Design (ICCD), Seoul, Korea, October 2014.
Slides

SIGSIM-PADS "Exploring Many-Core Architecture Design Space for Parallel Discrete Event Simulation"
Yi Zhang, Jingjing Wang, Dmitry Ponomarev, Nael Abu-Ghazaleh
ACM SIGSIM Conference on Principles of Advanced Discrete Simulation (SIGSIM-PADS), Denver, Colorado, May 2014.
Slides

HPCA "A Non-Inclusive Memory Permissions Architecture for Protection Against Cross-Layer Attacks"
Jesse Elwell, Ryan Riley, Nael Abu-Ghazaleh, Dmitry Ponomarev
20th International Symposium on High Performance Computer Architecture (HPCA), Orlando, Florida, February 2014.
Slides

TC "SIFT: Low-Complexity Energy-Efficient Information Flow Tracking on SMT Processors"
Meltem Ozsoy, Dmitry Ponomarev, Nael Abu-Ghazaleh, Tameesh Suri
IEEE Transactions on Computers, Volume 63, Issue 2, February 2014, pp.484-496

TC "Efficiently Securing Systems from Code Reuse Attacks"
Mehmet Kayaalp, Meltem Ozsoy, Nael Abu-Ghazaleh, Dmitry Ponomarev
IEEE Transactions on Computers, Volume 63, Issue 5, May 2014, pp.1144-1156

TPDS "Parallel Discrete Event Simulation for Multi-core Systems: Analysis and Optimization"
Jingjing Wang, Deepak Jagtap, Nael Abu-Ghazaleh, Dmitry Ponomarev
IEEE Transactions on Parallel and Distributed Systems (TPDS), Vol. 25, Issue 6, June 2014, pp. 1574-1584.

2013

SIGSIM-PADS "Interference-Resilient PDES on Multicore Systems: Towards Proportional Slowdown"
Jingjing Wang, Nael Abu-Ghazaleh, Dmitry Ponomarev
ACM SIGSIM Conference on Principles of Advanced Discrete Simulation (SIGSIM-PADS), Montreal, Canada, May 2013.

SIGSIM-PADS "Can PDES Scale in Environments with Heterogeneous Delays?"
Jingjing Wang, Ketan Bahulkar, Dmitry Ponomarev, Nael Abu-Ghazaleh
ACM SIGSIM Conference on Principles of Advanced Discrete Simulation (SIGSIM-PADS), Montreal, Canada, May 2013.

HPCA "SCRAP: Architecture for Signature-Based Protection From Code Reuse Attacks"
Mehmet Kayaalp, Junaid Nomani, Timothy Schmitt, Dmitry Ponomarev, Nael Abu-Ghazaleh
19th International Symposium on High Performance Computer Architecture (HPCA), Shenzhen, China, February 2013.
Slides

2012

ISCA "Branch Regulation: Low Overhead Protection From Code Reuse Attacks"
Mehmet Kayaalp, Meltem Ozsoy, Nael Abu-Ghazaleh, Dmitry Ponomarev
39th International Symposium on Computer Architecture (ISCA), Portland, OR, June 2012.
Slides

PADS "Characterizing and Understanding PDES Behavior on Tilera Architecture"
Deepak Jagtap, Ketan Bahulkar, Dmitry Ponomarev and Nael Abu-Ghazaleh
26th ACM/IEEE/SCS Workshop on Principles of Advanced and Distributed Simulation (PADS),Zhangjiajie, China, July 2012.

PADS "Partitioning on Dynamic Behavior for Parallel Discrete Event Simulation"
Ketan Bahulkar, Jingjing Wang, Nael Abu-Ghazaleh and Dmitry Ponomarev
26th ACM/IEEE/SCS Workshop on Principles of Advanced and Distributed Simulation (PADS),Zhangjiajie, China, July 2012.

PADS "Performance Analysis of a Multithreaded PDES Simulator on Multicore Clusters"
Jingjing Wang, Dmitry Ponomarev and Nael Abu-Ghazaleh
26th ACM/IEEE/SCS Workshop on Principles of Advanced and Distributed Simulation (PADS),Zhangjiajie, China, July 2012 (short paper).

IPDPS "Optimization of Parallel Discrete Event Simulator for Multi-core Systems"
Deepak Jagtap, Nael Abu-Ghazaleh and Dmitry Ponomarev
26th International Parallel and Distributed Processing Symposium (IPDPS), Shanghai, China, May 2012.

TACO/HiPEAC "Non-Monopolizable Caches: Low-Complexity Mitigation of Cache Side-Channel Attacks."
Leonid Domnitser, Aamer Jaleel, Jason Loew, Nael Abu-Ghazaleh and Dmitry Ponomarev
ACM Transactions on Architecture and Code Optimization (TACO), Special Issue of High Performance and Embedded Architectures and Compilers. Also to be presented at HIPEAC 2012 conference, Paris, France, January 2012.

2011

PaCT "CacheVisor: A Toolset for Visualizing Shared Caches in Multicore and Multithreaded Processors"
Dmitry Evtyushkin, Peter Panfilov, Dmitry Ponomarev
11th International Conference on Parallel Computing Technologies (PaCT), Kazan, Russia, September 2011.

DAC "TPM-SIM: A Framework for Performance Evaluation of Trusted Platform Modules"
Jared Schmitz, Jason Loew, Jesse Elwell, Dmitry Ponomarev, Nael Abu-Ghazaleh
48th Design Automation Conference (DAC'11), San Diego, June 2011.

CF "SIFT: A Low-Overhead Dynamic Information Flow Tracking Architecture for SMT Processors"
Meltem Ozsoy, Dmitry Ponomarev, Nael Abu-Ghazaleh, Tameesh Suri
8th ACM International Conference on Computing Frontiers (CF'11), Ischia, Italy, May 2011.

2010

ICCD "A Co-Processor Approach for Accelerating Data-Structure Intensive Algorithms"
Jason Loew, Jesse Elwell, Dmitry Ponomarev, Patrick Madden
IEEE International Conference on Computer Design (ICCD), Amsterdam, October 2010.

DS-RT "Performance Evaluation of PDES on Multicore Clusters"
Ketan Bahulkar, Nicole Hofmann, Deepak Jagtap, Nael Abu-Ghazaleh, Dmitry Ponomarev
14th IEEE/ACM International Symposium on Distributed Simulation and Real-Time Applications (DS-RT), Fairfax, VA, October 2010.

MMM-ACNS "A Predictive Model For Cache-based Side Channels in Multicore and Multithreaded Microprocessors"
Leonid Domnitser, Nael Abu-Ghazaleh, Dmitry Ponomarev
Fifth International Conference "Mathematical Methods, Models and Architectures for Computer Network Security", Saint-Petersburg, Russia, September 2010.

SASP "Customized Architectures for Faster Route Finding in GPS-Based Navigation Systems"
Jason Loew, Dmitry Ponomarev, Patrick Madden
IEEE Symposium on Application Specific Processors (SASP), June 2010.

2009

WCAE "A Two-tiered Modelling Framework for Undergraduate Computer Architecture Courses"
Jason Loew and Dmitry Ponomarev
Workshop on Computer Architecture Education, held in conjunction with MICRO-42.

DAC "MPTLsim: A Simulator for x86 Multicore Processors"
Hui Zeng, Matt Yourst, Kanad Ghose and Dmitry Ponomarev
46th Design Automation Conference (DAC-2009), San Fransisco, July 2009.

ISLPED "Energy Efficient Renaming with Register Versioning"
Hui Zeng, Ju-Young Jung, Kanad Ghose and Dmitry Ponomarev
International Symposium on Low Power Electronics and Design (ISLPED-2009), San Fransisco, August 2009.

ICPP "Register Versioning: A Low-Complexity Implementation of Register Renaming in Out-of-Order Microarchitectures"
Hui Zeng, Kanad Ghose and Dmitry Ponomarev
38th International Conference on Parallel Processing (ICPP-2009), Vienna, September 2009.

2008

SBAC-PAD "Hiding Communication Delays in Clustered Microarchitectures"
Robert LaDuca, Joseph Sharkey and Dmitry Ponomarev
20th IEEE International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD), Campo Grande, Brasil, October 2008.

SBAC-PAD "Accurate and Low-Overhead Dynamic Detection and Prediction of Program Phases Using Branch Signatures"
Balaji Vijayan and Dmitry Ponomarev
20th IEEE International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD), Campo Grande, Brasil, October 2008.

SBAC-PAD "Aggressive Scheduling and Speculation in Multithreaded Architectures: Is It Worth Its Salt?"
Jason Loew and Dmitry Ponomarev
20th IEEE International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD), Campo Grande, Brasil, October 2008.

ICPP "Two-Level Reorder Buffers: Accelerating Memory-bound Applications on SMT Architectures"
Jason Loew and Dmitry Ponomarev
37th International Conference on Parallel Processing (ICPP), September 2008.

TACO "Reducing Register Pressure in SMT Processors through L2-Miss-Driven Early Register Release"
Joseph Sharkey, Jason Loew, Dmitry Ponomarev
ACM Transactions on Architecture and Code Optimization (ACM TACO), Vol. 5, Issue 3, November 2008 .

TC "Predicting and Exploiting Transient Values for Reduced Register File Pressure and Energy Consumption"
Deniz Balkan, Joseph Sharkey, Dmitry Ponomarev, Kanad Ghose
IEEE Transactions on Computers, Vol.57, No 1, January 2008, pp.82-95.

TVLSI "Selective Writeback: Reducing Register File Pressure and Energy Consumption"
Deniz Balkan, Joseph Sharkey, Dmitry Ponomarev, Kanad Ghose
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 16, No 6, June 2008, pp.650-661.

2007

ICS "An L2-Miss-Driven Early Register Deallocation for SMT Processors"
Joseph Sharkey, Dmitry Ponomarev
21st ACM International Conference on Supercomputing (ICS'07), Seattle, WA, June 2007.

TC "Exploiting Operand Availability for Efficient Simultaneous Multithreading"
Joseph Sharkey, Dmitry Ponomarev
IEEE Transactions on Computers, Vol. 55, No 2., February 2007, pp.208-223.

2006

HiPC

"Trade-offs in Transient Fault Recovery Schemes for Redundant Multithreaded Processors"
Joseph Sharkey, Nayef Abu-Ghazaleh, Dmitry Ponomarev, Kanad Ghose and Aneesh Aggarwal
13th IEEE International Conference on High-Performance Computing (HiPC'06), Bangalore, India, December 2006, pp.135-147.

PACT "Adaptive Reorder Buffers for SMT Processors"
Joseph Sharkey, Deniz Balkan, Dmitry Ponomarev
15th IEEE/ACM International Conference on Parallel Architectures and Compilation Techniques (PACT'06),
Seattle, WA, September 2006, pp.244-253.

PACT "SPARTAN: Speculative Avoidance of Register Allocations to Transient Values for Performance and Energy-Efficiency"
Deniz Balkan, Joseph Sharkey, Dmitry Ponomarev, Kanad Ghose
15th IEEE/ACM International Conference on Parallel Architectures and Compilation Techniques (PACT'06)
Seattle, WA, September 2006, pp.265-274.

ISLPED "Selective Writeback: Exploiting Transient Values for Performance and Energy-Efficiency"
Deniz Balkan, Joseph Sharkey, Dmitry Ponomarev, Kanad Ghose
IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED'06),
Tegernsee, Germany, October 2006.

ICPP "Balancing ILP and TLP in SMT Architectures through Out-of-Order Instruction Dispatch"
Joseph Sharkey and Dmitry Ponomarev
35th International Conference on Parallel Processing (ICPP'06), Columbus OH, August 2006, pp.329-336.

ICPP "Address-Value Decoupling for Early Register Deallocation"
Deniz Balkan, Joseph Sharkey, Dmitry Ponomarev and Aneesh Aggarwal
35th International Conference on Parallel Processing (ICPP'06), Columbus OH, August 2006, pp.337-343.

ASGI "Exploiting Short-Lived Values for Low-Overhead Transient Fault Recovery"
Nayef Abu-Ghazaleh, Joseph Sharkey, Dmitry Ponomarev and Kanad Ghose
to appear in Workshop on Architectural Support for Gigascale Integration (ASGI'06),
held in conjunction with ISCA-33, Boston, MA, June 2006.

HPCA "Efficient Instruction Schedulers for SMT Processors"
Joseph Sharkey and Dmitry Ponomarev
12th International Symposium on High Performance Computer Architecture (HPCA-12) , Austin TX, February 2006, pp.303-313.

TACO "Instruction Packing: Toward Fast and Energy-Efficient Instruction Scheduling"
Joseph Sharkey, Dmitry Ponomarev, Kanad Ghose, Oguz Ergin
ACM Transactions on Architecture and Code Optimization (ACM TACO), vol.3, No 2, June 2006, pp.156-181.

TC "Early Register Deallocation Mechanisms Using Checkpointed Register Files"
Oguz Ergin, Deniz Balkan, Dmitry Ponomarev, Kanad Ghose
IEEE Transactions on Computers, vol.55, No 9, pp.1153-1166, September 2006.

TC "Dynamic Resizing of Superscalar Datapath Components for Energy-Efficiency"
Dmitry Ponomarev, Gurhan Kucuk, Kanad Ghose
IEEE Transactions on Computers, Volume 55, No.2, February 2006, pp.199-213.

2005

IEE CDT

"Reducing the Power Dissipation of Register Alias Tables in High Performance Processors"
Gurhan Kucuk, Oguz Ergin, Dmitry Ponomarev, Kanad Ghose
IEE Proceedings, Computer and Digital Techniques, Volume 152, Issue 6, November 2005, pp.739-746.

IBM P=AC2

"Scalable, Low-Complexity Instruction Schedulers for SMT Processors"
Joseph Sharkey, Deniz Balkan, Dmitry Ponomarev
2nd IBM Watson Conference on the Interaction between Architecture, Circuits and Compilers (P=ac2), October 2005.

ICCD

"Power-Efficient Wakeup Tag Broadcast"
Joseph Sharkey, Kanad Ghose, Dmitry Ponomarev, Oguz Ergin
23rd IEEE International Conference on Computer Design (ICCD'05) , San Jose, CA, October 2005.

EURO-PAR

"Non-Uniform Instruction Scheduling"
Joseph Sharkey, Dmitry Ponomarev
11th International ACM/IEEE Euro-Par Conference , Lisbon, Portugal, August-September 2005. Acceptance rate - 31%

EURO-PAR

"Instruction Recirculation: Eliminating Counting Logic in Wakeup Free Schedulers"
Joseph Sharkey, Dmitry Ponomarev
11th International ACM/IEEE Euro-Par Conference , Lisbon, Portugal, August-September 2005. Acceptance rate - 31%

ISLPED

"Instruction Packing: Reducing Power and Delay of the Dynamic Scheduling Logic"
Joseph Sharkey, Dmitry Ponomarev, Kanad Ghose, Oguz Ergin
IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED'05) , San Diego, CA, August 2005.
Acceptance rate for full papers - 9%

2004

MICRO

"Register Packing: Exploiting Narrow-Width Operands for Reducing Register File Pressure"
Oguz Ergin, Deniz Balkan, Kanad Ghose, Dmitry Ponomarev
37th IEEE/ACM International Symposium on Microarchitecture (MICRO-37) , Portland, OR, December 2004.

TC	"Energy-Efficient Comparators for Superscalar Datapaths" Dmitry Ponomarev, Gurhan Kucuk, Oguz Ergin, Kanad Ghose IEEE Transactions on Computers, vol.53, No. 7, July 2004, pp.892-904.

TC	"Isolating Short-Lived Operands for Energy Reduction" Dmitry Ponomarev, Gurhan Kucuk, Oguz Ergin, Kanad Ghose IEEE Transactions on Computers, vol. 53, No. 6, June 2004, pp. 697-709.

TC	"Complexity-Effective Reorder Buffer Designs for Superscalar Processors" Gurhan Kucuk, Dmitry Ponomarev, Oguz Ergin, Kanad Ghose IEEE Transactions on Computers, vol.53, No. 6, June 2004, pp.653-665.

PACS

"Reducing Delay and Power Consumption of the Wakeup Logic Through Instruction Packing and Tag Memoization"
Joseph Sharkey, Dmitry Ponomarev, Kanad Ghose, Oguz Ergin
4th Workshop on Power-Aware Computer Systems (PACS), held in conjuncton with the
37th IEEE/ACM International Symposium on Microarchitecture (MICRO-37) , Portland, OR, December 2004.

IBM P=AC2

"Selective Writeback: Improving Processor Performance and Energy-Efficiency"
Deniz Balkan, Oguz Ergin, Dmitry Ponomarev, Kanad Ghose
1st Watson Conference on Interaction between Architecture, Circuits and Compilers (P=ac2 conference),
IBM Research Center at Yorktown Heights, October 2004, pp.171-180.

VPW2

"Predicting, Detecting and Exploiting Transient Values"
Deniz Balkan, Dmitry Ponomarev, Kanad Ghose
2nd Value Prediction and Value-based Optimization Workshop, in conjunction with ASPLOS-XI , October 2004, pp.18-25.

ICCD

"Increasing Processor Performance Through Early Register Release"
Oguz Ergin, Deniz Balkan, Dmitry Ponomarev, Kanad Ghose
22nd IEEE International Conference on Computer Design (ICCD'04) , October 2004, pp.480-487.

2003

TVLSI

"Energy-Efficient Issue Queue Design"
Dmitry Ponomarev, Gurhan Kucuk, Oguz Ergin, Kanad Ghose, Peter Kogge
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 11, No 5, October 2003, pp. 789-800.

ICCD

"Distributed Reorder Buffer Schemes for Low Power"
Gurhan Kucuk, Oguz Ergin, Dmitry Ponomarev, Kanad Ghose
21st IEEE International Conference on Computer Design (ICCD'03) , San Jose, CA, October 2003, pp.364-370.

PACT

"Reducing Datapath Energy Through the Isolation of Short-Lived Operands"
Dmitry Ponomarev, Gurhan Kucuk, Oguz Ergin, Kanad Ghose
12th IEEE International Conference on Parallel Architectures and Compilation Techniques (PACT'03) , New Orleans, September 2003, pp.258-268.

ISLPED

"Reducing Reorder Buffer Complexity Through Selective Operand Caching"
Gurhan Kucuk, Dmitry Ponomarev, Oguz Ergin, Kanad Ghose
IEEE/ACM International Symposium on Low-Power Electronics and Design (ISLPED'03) , Seoul, South Korea, August 2003, pp. 235-240.

ISLPED

"Power Efficient Comparators for Long Arguments in Superscalar Processors"
Dmitry Ponomarev, Gurhan Kucuk, Oguz Ergin, Kanad Ghose
IEEE/ACM International Symposium on Low-Power Electronics and Design (ISLPED'03) , Seoul, South Korea, August 2003, pp. 378-383.

PATMOS

"Energy Efficient Register Renaming"
Gurhan Kucuk, Oguz Ergin, Dmitry Ponomarev, Kanad Ghose
13th International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS'03), Torino, Italy, September 2003. Published as Lecture Notes in Computer Science (LNCS 2799), pp.219-228, Springer-Verlag.

2002

ICCD

"A Circuit-Level Implementation of Fast, Energy-Efficient CMOS Comparators for High-Performance Microprocessors"
Oguz Ergin, Kanad Ghose, Gurhan Kucuk, Dmitry Ponomarev
20th IEEE International Conference on Computer Design (ICCD'02) , Freiburg, Germany, September 2002, pp.118-121.

PATMOS

"Energy-Efficient Design of the Reorder Buffer"
Dmitry Ponomarev, Gurhan Kucuk, Kanad Ghose
12th International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS'02) Seville, Spain, September 2002. Published as Lecture Notes in Computer Science, vol. 2451, pp.289-299, Springer-Verlag.

ICS

"Low-Complexity Reorder Buffer Architecture"
Gurhan Kucuk, Dmitry Ponomarev, Kanad Ghose
16th ACM International Conference on Supercomputing (ICS'02), New York, June, 2002, pp. 57-66.

DATE

"AccuPower: An Accurate Power Estimation Tool for Superscalar Microprocessors"
Dmitry Ponomarev, Gurhan Kucuk, Kanad Ghose
5th Design, Automation and Test in Europe Conference (DATE'02), Paris, France, March 2002, pp. 124-129.

2001

MICRO "Reducing Power Requirements of Instruction Scheduling Through Dynamic Allocation of Multiple Datapath Resources"
Dmitry Ponomarev, Gurhan Kucuk and Kanad Ghose
34th IEEE/ACM International Symposium on Microarchitecture (MICRO-34), December 2001, pp. 90-101.

ISLPED "Energy-Efficient Instruction Dispatch Buffer Design for Superscalar Processors"
Gurhan Kucuk, Kanad Ghose, Dmitry Ponomarev, Peter Kogge
IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED'01), Huntington Beach, USA, August 2001, pp. 237-242.

EURO-PAR "Optimal Polling for Latency-Throughput Tradeoffs in Queue-Based Network Interfaces for Clusters"
Dmitry Ponomarev, Kanad Ghose, Eugeny Saksonov
7th ACM Euro-Par Conference, Manchester, UK. Published as LNCS 2150, Springer-Verlag, August 2001, pp.86-95.

WCED "Dynamic Allocation of Datapath Resources for Low Power"
Dmitry Ponomarev, Gurhan Kucuk and Kanad Ghose,
Workshop on Complexity-Effective Design (WCED'01), 28th International Symposium on Computer Architecture (ISCA-28), Goteborg, Sweden, June 2001

IWIA "Power Reduction in Superscalar Datapaths Through Dynamic Bit-Slice Activation"
Dmitry Ponomarev, Gurhan Kucuk, Kanad Ghose
International Workshop "Innovative Architecture for Future Generation High-Performance Processors and Systems" (IWIA'01), January 2001, pp.16-24. Invited paper

2000 and before

KOOLCHIPS "Exploiting Bit-Slice Inactivities for Reducing Energy Requirements of Superscalar Processors"
Kanad Ghose, Dmitry Ponomarev, Gurhan Kucuk, Andrew Flinders, Peter M.Kogge, Nikzad Toomarian
Kool Chips Workshop, 33rd International Symposium on Microarchitecture ( MICRO-33), Monterey, CA, December 2000.

HIPC "A Comparative Study of Some Network Subsystem Organizations"
Dmitry Ponomarev and Kanad Ghose
5th IEEE/ACM International Conference on High Performance Computing (HiPC 98), Chennai, India, December 1998, pp. 436-443.