Links removed by the Instructor.
| Project | Due Date | Description/Materials | Solution |
|---|---|---|---|
| Project 01 | Sept. 26 | Instructions | Solutions |
| Project 02 | Nov. 04 | Instructions
Suggestions on how to Develop Project 2 P01 - Verilog P02 - Languages P03 Multi-Language Programs P04 Array Parameters tokenizeVerilog.c and tokenizeVerilog.h mux.v and fullAdder.v | printTokens.c
simCircuit.c simCircuit.v2.c - Alternate solution simCircuit.v3.c- Another alternate Grading Test Cases: encode.v, decode.v Syntax Error Cases: muxsa.v, muxsb.v, muxsc.v, mucsd.v |
| Project 03 | Dec 03 | Project 3 Instructions
Project 3 Files | |
| Project 04 | Dec 12 | Project 4 Instructions |