CS-424, Homework
Due: 3-4-09

The 64K address space of a PIC17Cxxx microcontroller-based system is 
to be configured as follows using external memory chips:

Lowest bank: an 8K RAM chip (RAM1)
A 6K gap
Next: a 2K RAM chip (RAM2)
An 8K gap
Next: a 4K ROM chip (ROM1)
At the highest possible addresses: a 16K ROM chip (ROM2)

Each memory location in each of these memory chips stores one byte 
of data.

(A) Draw a memory map of the system showing where RAM1, RAM2, ROM1, 
and ROM2 would be located. (The first and last address, expressed 
in hex, should specified for each chip.)

(B) Design an interface between the PIC and the memory chips. 
Address decoding should be done using the appropriate gates. You 
may assume that each ROM has a CS* (chip select) input that selects 
the chip when active and an OE* (output enable) line that reads 
from the chip when active, provided CS* is also active. Each RAM 
chip has the following input signal lines: CS* (chip select), WE* 
(write enable) that will write to the RAM when active, and OE* 
(output enable) that will read from the RAM when active. CS* must 
be active to read from or write to the RAMS.

(C) If four 74LS677 comparators were to be used to do the external 
decoding, show how they would be connected to the microcontroller 
and the memory chips. In each case indicate what voltage values 
would be connected to each of its P lines.

(D) If a PROM address decoder were to be used in this interface, 
show how the PROM should be programmed (values stored in each range 
of memory locations) and connected to the PIC and to the memory 
chips. (Each word of the PROM decoder will contain 4 bits, one of 
which will go to one of the memory chip's CS* signals.)