Networking and Parallel Processing Lab.
Faculty:


Actively seeking motivated and capable Graduate (and undergraduate) students interested in computer system research (specifically, mobile computing, networking, PDES or high-performance computer architecture) with a graduation horizon of 2 semesters or more. Related Publications


High Performance Computer Architecture (Processing in memory, parallel processing, polymorphic computing)

Summary:
As we continue to head towards deep submicron VLSI fabrication processes, many of the accepted principles governing computer architecture design are changing.  This change is also fueled by the changing nature of workloads that are becoming increasingly heavy in multimedia content (with intensive memory requirements and a large degree of inherent parallelism).   Wire delays will dominate gate delays, and a distributed modularized design where most communication is localized becomes necessary.  Also, techniques for low-power design are important, especially for mobile devices (which will also account for an increasing segment of the market).  Revolutionary architectural models are needed to address these trends.  For example, processor speed has increased at a much faster yearly rate (60%) than that of DRAM memory speed (7%), causing a wide and increasing gap between the memory needs of CPUs and the bandwidth that the memory subsystem is able to deliver.  Large and expensive caches take up over 50% of the die area of modern CPUs, but cannot hide the memory bottleneck successfully, especially for data intensive applications.  Integrating processing logic with memory is a promising approach for alleviating this problem because: (i) DRAM is much denser than SRAM (50X factor in some recent designs); (ii) the bandwidth exposed to the processor is on the order of terabytes per second (bandwidth at sense amplifiers), vs the few hundred MBytes per second available on current generation of system buses; and (iii) the latency for memory access is smaller (since data only has to travel within chip).

Current Research Problems include:

Related Publications


Selected Recent Publications (pdf Format)

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Last Updated: Wed Nov  8  14:15:12 EST 2000
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