"Non-Monopolizable Caches: Low-Complexity Mitigation of Cache Side-Channel Attacks"
Leonid Domnitser, Aamer Jaleel, Jason Loew, Nael Abu-Ghazaleh, Dmitry Ponomarev
in ACM Transactions on Architecture and Code Optimization (TACO), Special Issue of High Performance and Embedded Architectures and Compilers.
Also to be presented at HIPEAC 2012, Paris, France, January 2012.

"TPM-SIM: A Framework for Performance Evaluation of Trusted Platform Modules"
Jared Schmitz, Jason Loew, Jesse Elwell, Dmitry Ponomarev, Nael Abu-Ghazaleh
in the 48th Design Automation Conference (DAC), San Diego, June 2011.

"Mathematical Limits of Parallel Computation for Embedded Systems"
Jason Loew, Jesse Elwell, Dmitry Ponomarev, Patrick Madden
in the 16th Asia and South Pacific Design Automation Conference (ASP-DAC 2011), Yokohama, Japan, January 2011.

"A Co-Processor Approach for Accelerating Data-Structure Intensive Algorithms"
Jason Loew, Jesse Elwell, Patrick Madden, Dmitry Ponomarev
in the 28th IEEE International Conference on Computer Design (ICCD 2010), Amsterdam, the Netherlands, October 2010.

"Customized Architectures for Faster Route Finding in GPS-Based Navigation Systems"
Jason Loew, Patrick Madden, Dmitry Ponomarev
in the 8th IEEE Symposium on Application Specific Processors (SASP 2010), held in conjunction with the 47th ACM/EDAC/IEEE Design Automation Conference (DAC), June 2010.

"A Two-Tiered Modeling Framework for Undergraduate Computer Architecture Courses"
Jason Loew, Dmitry Ponomarev
in the proceedings of the Workshop on Computer Architecture (WCAE 2009), held in conjunction with MICRO-42, December 2009.

"Aggressive Scheduling and Speculation in Multithreaded Architectures: Is It Worth Its Salt?"
Jason Loew, Dmitry Ponomarev
in the 20th International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD), Campo Grande, Brasil, October 2008.

"Two-Level Reorder Buffers: Accelerating Memory-bound Applications on SMT Architectures"
Jason Loew, Dmitry Ponomarev
in the 37th International Conference on Parallel Processing (ICPP), September 2008.

"Reducing Register Pressure in SMT Processors through L2-Miss-Driven Early Register Release"
Joseph Sharkey, Jason Loew, Dmitry Ponomarev
in ACM Transactions on Architecture and Code Optimization (ACM TACO), Volume 5, Issue 3, November 2008.