CS-580a - Spring 2004

Advanced Topics in Computer Architecture

Instructor: Dmitry Ponomarev
Office: ENGB, N-26
Phone: 777-4023
E-mail: dima AT cs DOT binghamton DOT edu
Office Hours: Tuesday and Thursday, 4:00 - 5:00 and by appointment

Class meets: Tuesday & Thursday, 6:00 - 7:30, Fine Arts Building, Room 242

FINAL PROJECT REPORTS ARE DUE ON THURSDAY, MAY 13TH

MUST READ
Advice on How to Give a Good Talk
Advice to Systems Researchers


Course Syllabus

Background reading:
J.Smith, G.Sohi, "The Microarchitecture of Superscalar Processors", in Proceedings of IEEE, 1995.

SIMULATION TOOLS

Update of Feb.11: The support for warming up the cache and branch predictor before starting the full simulator has been added.
This is done with the "-warmupstart <cycles>" parameter or:
  make WARMUPSTART=1000000 FULLSTART=2000000 run
This starts the cache/branch warmup after 1M cycles and does another 1M cycles of fast simulation until starting the full simulator at 2 million cycles.

The new version of the simulator (updated on Feb 8) is now availiable. A couple of things were fixed on Feb.8, so be sure to get the new version.
The easiest way to get started is to copy the simulator files from Matt's home directory to yours, as follows:

cp -a /home/yourst/simulator /home/youruserid

This will make a copy of the latest code in your home directory, all ready for use and modification. It has the right paths set up, uses gcc-3.3, etc.

If you want to use this on your own Linux machine, everything in the simulator
directory is in /home/yourst/simulator-for-cs580a.tar.gz
Here is the Simplescalar technical report that describes the instruction set.

Additional resources
University of Wisconsin Computer Architecture page
Proceedings of ISCA and MICRO are available from the ACM digital library - the access is free from any campus computer

Part I. Fast, Scalable and Low-Complexity Dynamic Schedulers

Readings for Thursday, January 22nd. Critiques for both papers due at the beginning of Thursday's class
S. Palacharla, N. Jouppi, J. Smith, "Complexity-Effective Superscalar Processors",  ISCA, 1997. 
J.Stark, M.Brown, Y.Patt, "On Pipelining Dynamic Instruction Scheduling Logic", MICRO, 2000.

Readings for the week of January 26th
R. Canal, A. Gonzalez, "A Low-Complexity Issue Logic", ICS, 2000. Critique due: Tuesday, January 27th. Presenter - James. Talk slides
D. Ernst, T. Austin, "Efficient Dynamic Scheduling Through Tag Elimination", ISCA, 2002. Critique due: Tuesday, January 27th. Presenter - Balaji. Talk slides
E. Brekelbaum et.al., "Hierarchical Scheduling Windows", MICRO, 2002. Critique due: Thursday, January 29th. Presenter - Matt
I. Kim, M. Lipasti, "Half-Price Architecture", ISCA, 2003. Critique due: Thursday, January 29th. Presenter - Deniz. Talk slides

Readings for the week of February 2nd
On February 5th, Matt will be giving a tutorial on the linux version of the simulator. Talk slides
A, Lebeck, et.al. "A Large,Fast Instruction Window for Tolerating Cache Misses", ISCA 2002. Critique due: Thursday, February 5th. Presenter - Faiz. Talk slides

Readings for the class of February 10th
M.Brown, et.al. "Select-Free Instruction Scheduling Logic", MICRO, 2001. Critique due: Tuesday, February 10th. Presenter - Gurram. Talk slides
I.Kim, M.Lipasti, "Macro-op Scheduling: Relaxing Scheduling Loop Constraints", MICRO, 2003. Critique due: Tuesday, February 10th. Presenter - Joe. Talk slides

Part II. Power-Aware Microarchitectures

A. Introduction

Thursday, February 12th. Introductory lecture on the subject. Read the following papers for Thursday's class. No critiques are required, just make sure you read the papers before class. Lecture notes
D.Brooks, et.al., "Power-Aware Microarchitecture: Design and Modeling Challenges for Next-Generation Microprocessors," IEEE Micro, Nov./Dec., 2000.
D.Brooks, V. Tiwari, and M. Martonosi. "Wattch: A Framework for Architectural-Level Power Analysis and Optimizations," ISCA 2000.

B. Fast, Low-Complexity, and Energy-Efficient Register File Designs

Readings for the week of  February 16th
R. Balasubramonian, et.al., "Reducing the Complexity of the RF in Dynamic Superscalar Processors", MICRO 2001.  Critique due: Feb 17th. Presenter - Hui. Talk slides
Il Park, et.al., "Reducing Register Ports for Higher Speed and Lower Energy", MICRO 2002. Critique due: Feb 17th. Presenter - Bharathi
J. Tseng and K. Asanovic, "Banked Multiported RFs for High-Frequency Superscalar Microprocessors", ISCA 2003. Critique due: Feb 19th. Presenter - Yigit
N.Kim, T.Mudge, "Reducing Register Ports Using Delayed Write-Back Queues and Operand Pre-Fetch", ICS 2003. Critique due: Feb. 19th. Presenter - Prateek. Talk slides

C. Energy-Efficient Cache Designs

Readings for Tuesday,  February 24th.  Critiques for both papers are due on Feb.24
K.Ghose, M.Kamble, "Reducing Power in Superscalar Processor Caches Using Subbanking, Multiple Line Buffers and Bitline Segmentation", ISLPED 1999. Presenter - Balaji. Talk slides
S. Kaxiras, Z. Hu, M.Martonosi, "Cache Decay: Exploiting Generational Behavior to Reduce Cache Leakage Power", ISCA 2001. Presenter - James. Talk slides

D. Adaptive Architectures for Low Power

Readings for Thursday, February 26th.  Critiques for both papers are due on Feb.26
D.Ponomarev, G.Kucuk, K.Ghose, "Reducing Power Requirements of Instruction Scheduling Through Dynamic Allocation of Multiple Datapath Resources", MICRO 2001. I will present this paper. Talk slides
A.Buyuktosunoglu et.al., "Energy Efficient Co-Adaptive Instruction Fetch and Issue", ISCA 2003. Presenter - Matt.  Talk slides

E. Clock-gating, GALS, Voltage Scaling

Readings for Tuesday, March 2nd. Critiques for both papers are due on March 2nd.
I. Bahar, S. Manne, "Power and Energy Reduction Via Pipeline Balancing", ISCA 2001. Presenter - Hui. Talk slides
H.Li et.al., "Deterministic Clock Gating for Microprocessor Power Reduction", HPCA 2003. Presenter - Gurram. Talk slides

Readings for Thursday, March 4th. Critiques for both papers are due on March 4th
G.Semeraro et.al., "Energy-Efficient Processor Design Using Multiple Clock Domains with Dynamic Voltage and Frequency Scaling", HPCA 2002. Presenter - Oguz
D.Ernst, et.al., "Razor: A Low-Power Pipeline Based on Circuit-Level Timing Speculation", MICRO 2003. Presenter - Prateek. Talk slides

ISCA 2000 tutorial on low power design

Part III. Processors with Large Instruction Windows

Readings for Tuesday, March 9th. Critiques for both papers are due on March 9th.
H. Akkary et.al., "Checkpoint Processing and Recovery: Towards Scalable Large Instruction Window Processors", MICRO 2003. Presenter - Joe. Talk slides
A. Cristal, et.al., "Out-of-Order Commit Processors", HPCA 2004.  Presenter - Deniz. Talk slides

Readings for Thursday, March 18th.  Critiques for both papers are due on March 18th
O. Mutlu, et.al., "Runahead Execution: an Alternative to Very Large Instruction Windows for Out-of-Order Processors", HPCA 2004. Presenter - Faiz. Talk slides
J. Martinez et.al., "Cherry: Checkpointed Early Resource Recycling in Out-of-Order Microprocessors", MICRO 2002.  Presenter - James. Talk slides

Readings for Tuesday,  March 23rd. Critiques for both papers are due on  March 23rd.
S. Sethumadhavan, et.al., "Scalable Hardware Memory Disambiguation for High ILP Processors", MICRO 2003. Presenter - Matt. Talk slides
Il Park, et.al., "Reducing Design Complexity of the Load/Store Queue", MICRO 2003. Presenter - Balaji.  Talk slides


Part IV. Predicting and Exploiting Critical Path Information

Readings for Thursday, March 25th. Critiques for both papers are due on  March 25th
E.Tune, et.al., "Dynamic Prediction of Critical Path Instructions", HPCA 2001. Presenter - Hui. Talk slides
S.Srinivasan, et.al., "Locality vs. Criticality", ISCA 2001. Presenter - Bharathi. Talk slides

Readings for Tuesday, March 30th. Critiques for both papers are due on  March 30th
Fields, B., et.al., "Slack: Maximizing Performance Under Technological Constraints", ISCA 2002. Presenter - Joe. Talk slides
Tune, E., et.al., "Quantifying Instruction Criticality", PACT 2002. Presenter - Gurram. Talk slides


Part V. Advanced Speculation Techniques

A. Value Prediction

Readings for Thursday, April 1st: Critiques for both papers are due on April 1st (YOU CAN COMBINE THESE TWO CRITIQUES  INTO ONE). Deniz will give an overview talk on value prediction. Talk slides
Sazeides, Y., Smith, J., "The Predictability of Data Values", MICRO 1997 
Burtscher, M., Zorn, B., "Hybrid Load Value Predictors", IEEE Transactions on Computers, 2002.

B.  Memory Dependence Prediction

Readings  for Tuesday, April 13th: Critiques for all three papers are due on  April 13th.
A. Moshovos, G. Sohi, "Steamlining Inter-Operation Memory Communication via Data Dependence Prediction", MICRO 1997. Presenter - James. Talk slides
G. Chrysos, J.Emer, "Memory Dependence Prediction using Store Sets", ISCA 1998. Presenter - Faiz. Talk slides
Yoaz, A.,et.al. "Speculation Techniques for Improving Load-related Instruction Scheduling", ISCA 1999.  Presenter - Joe. Talk slides

C.  Latency Prediction and Speculative Scheduling

Readings for Thursday, April 15th:  Critiques for both papers are due on  April 15th
Morancho E., et.al., "Recovery Mechanism for Latency Misprediction", PACT  2001. Presenter - Balaji. Talk slides
Kim, I., Lipasti, M., "Understanding Scheduling Replay Schemes", HPCA 2004. Presenter - Matt  Talk slides


Part VI. Clustered Microarchitectures 

Readings for Tuesday, April 20th Critiques for both papers are due on  April 20th
Farkas, K., et.al., "The Multicluster Architecture: Reducing Cycle Time Through Partitioning", MICRO 1997. Presenter - Hui. Talk slides
Canal, R., et.al., "Dynamic Cluster Assignment Mechanisms", HPCA 2000. Presenter - Deniz. Talk slides


Part VII. Multithreaded Processors and CMPs

Background readings (no critiques needed).  I will give a short overview of these papers on Tuesday.
Tullsen, D., et.al., "Exploiting Choice: Instruction Fetch and Issue on an Implementable Simultaneous Multithreading Processor", ISCA 1996.
Olukotun, K.,et.al.  "The Case for a Single-Chip Multiprocessor", ASPLOS 1996.

Readings for Thursday, April 22nd (Critiques for both papers are due on April 22nd)
Wallace, S., et.al., "Threaded Multiple Path Execution", ISCA 1998. Presenter - Gurram. Slides
Akkary, H., Driscoll, M.,"A Dynamic Multithreading Processor", MICRO 1998. Presenter - Joe. Slides

Readings for Tuesday, April 27th (Critiques for both papers are due on April 27th)
Zilles, C., Sohi, G., "Execution-based Prediction Using Speculative Slices", ISCA 2001. Presenter - James. Slides
Collins, et.al., "Dynamic Speculative Precomputation", MICRO 2001. Presenter - Matt. Slides

Tutorial on speculative precomputation (given at PACT'03)

Readings for Thursday, April 29th (Critiques for both papers are due on April 29th)
Rotenberg, E., et.al., "Slipstream Processors: Improving both Performance and Fault Tolerance", ASPLOS 2000. Presenter - Bharathi. Slides
Zilles, C., Sohi, G., "Master/Slave Speculative Parallelization", MICRO 2002. Presenter - Deniz. Slides


Tuesday, May 4th: PROJECT PRESENTATIONS.  Presenters - James, Deniz, Hui, Gurram and Faiz

Thursday, May 6th: PROJECT PRESENTATIONS. Presenters - Matt, Joe, Bharathi, Balaji


THAT'S IT !   FINAL PROJECT REPORTS ARE DUE ON THURSDAY, MAY 13TH.

I will send you an e-mail about the Summer Computer Architecture Reading Group sometime in the beginning of June.