Dmitry Ponomarev

Dmitry Ponomarev

Professor
Department of Computer Science
State University of New York at Binghamton
Binghamton, NY 13902-6000
Office: Q-9, Engineering Building
Phone: (607) 777-4023
E-mail: dponomar at binghamton dot edu

PUBLICATIONS
STUDENTS

ARCHITECTURE FOR SECURITY LAB

Dmitry Ponomarev is a Professor in the Department of Computer Science at SUNY Binghamton. His research interests are in the areas of computer architecture, cybersecurity, high-performance computing and parallel discrete event simulation. He published in leading conferences in these areas, including papers in ISCA, MICRO, ASPLOS, HPCA, CCS, DAC, ICCAD, ICS, PACT, IPDPS and SIGSIM-PADS. His research has been funded by the National Science Foundation, the Air Force Research Laboratory, the Air Force Office of Scientific Research and Intel. In 2016, he received SUNY Chancellor's Award for Excellence in Scholarship and Creative Activities. Four of his PhD students have been recepients of Binghamton Graduate Student Award for Excellence in Research.

Selected Recent Publications Google Scholar DBLP

Adversarial Evasion-Resilient Hardware Malware Detectors (ICCAD'18, Invited paper)
EnsembleHMD: Accurate Hardware Malware Detectors with Specialized Ensemble Classifiers (TSDC'18)
BranchScope: A New Side-Channel Attack on Directional Branch Predictor (ASPLOS'18)
RHMD: Evasion-Resilient Hardware Malware Detectors (MICRO'17)
Hardening Extended Memory Access Control Schemes with Self-Verified Address Spaces (ICCAD'17)
Performance Characterization of Parallel Discrete Event Simulation on Knights Landing Processor (SIGSIM-PADS'17)
RIC: Relaxed Inclusion Caches for Mitigating LLC Side-Channel Attacks (DAC'17)
Covert Channels through Random Number Generator: Mechanisms, Capacity Estimation and Mitigations (CCS'16)
Jump over ASLR: Attacking Branch Predictors to Bypass ASLR (MICRO'16)
Flexible Hardware-Managed Isolated Execution: Architecture, Software Support and Applications (TDSC'16)
A Hign-Resolution Side-Channel Attack on Last-Level Cache (DAC'16, Best paper nominee)
Understanding and Mitigating Covert Channels through Branch Predictors (TACO'16)
Hardware-based Malware Detection Using Low-Level Architectural Features (TC'16, extended version of HPCA'15)
Rethinking Memory Permissions for Protection Against Cross-Layer Attacks (TACO'15, extended version of HPCA'14)
Ensemble Learning for Low-level Hardware-supported Malware Detection (RAID'15)
Controlled Contention: Balancing Contention and Reservation in Multicore Application Scheduling (IPDPS'15)
Iso-X: A Flexible Architecture for Hardware-Managed Isolated Execution (MICRO'14)
SIFT: Low-Complexity Energy-Efficient Information Flow Tracking on SMT Processors (TC'14, extended version of CF'11)
Efficiently Securing Systems from Code Reuse Attacks (TC'14, extended version of ISCA'12)
Signature-based Protection from Code Reuse Attacks (TC'14, extended version of HPCA'13)
Parallel Discrete Event Simulation for Multi-Core Systems: Analysis and Optimization (TPDS'14, extended version of IPDPS'12)

Awards and Nominations

Binghamton University's Watson School Recognition Award for Distinguished Educator, 2017
SUNY Chancellor's Award for Excellence in Scholarship and Creative Activities, 2016
Best paper nominee, Design Automation Conference (DAC), 2016
Distinguished Dissertation Award, Binghamton University, 2003
Graduate Student Award for Excellence in Research, Binghamton University, 2003
Graduate Student Award for Excellence in Teaching, Binghamton University, 2003

Research Interests

Computer Architecture
Cybersecurity
High-Performance Computing

Current Courses (Fall 2018):

CS-320 Computer Systems III: Advanced Computer Architecture

Recent Program Committee Service

ISCA'19, HPCA'19, MICRO'18, ICCD'18, HOST'18, HASP'18, ICCD'17, HASP'17, HOST'17, ICCD'16, ICS'16, HASP'16, MICRO'15, ICCD'15, HASP'15, ICCD'14, ICS'13

External Review Committee Service

HPCA'18, MICRO'17, ISCA'17, ISCA'16, HPCA'16, ISCA'15, HPCA'15